Invention Grant
US08816770B2 Low-voltage constant-gm rail-to-rail CMOS input stage with improved gain
有权
低电压恒定gm轨到轨CMOS输入级，增益提高
- Patent Title: Low-voltage constant-gm rail-to-rail CMOS input stage with improved gain
- Patent Title (中): 低电压恒定gm轨到轨CMOS输入级，增益提高
-
Application No.: US13595102Application Date: 2012-08-27
-
Publication No.: US08816770B2Publication Date: 2014-08-26
- Inventor: Kishan Pradhan
- Applicant: Kishan Pradhan
- Applicant Address: US CA San Jose
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA San Jose
- Agency: Christopher P. Maiorana, PC
- Main IPC: H03F3/45
- IPC: H03F3/45
Abstract:
The present invention concerns an apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate an output signal in response to a differential input signal, a first power supply and a ground. The output signal may have a rail-to-rail voltage with a magnitude between the first power supply and the ground. The first circuit may also be configured to source an intermediate differential signal in response to the differential input signal, the first power supply and ground. The second circuit may be configured to sink the differential intermediate signal in response to the differential input signal, the first power supply, ground and a second power supply. The second circuit may flatten the transconductance of the first circuit relative to a common mode voltage of the differential input signal.
Public/Granted literature
- US20140055200A1 LOW-VOLTAGE CONSTANT-gm RAIL-TO-RAIL CMOS INPUT STAGE WITH IMPROVED GAIN Public/Granted day:2014-02-27
Information query
