In one embodiment, an apparatus may include a de-serializer to convert serial data into two parallel data streams, and a control unit to provide a first update signal and a second update signal based on a bit count of the serial data. The apparatus may further include a target component having an input bus, the input bus including a first portion and a second portion. The apparatus may further include a first output unit to provide the first set of parallel data to the first portion of the input bus, and a second output unit to provide the second set of parallel data to the second portion of the input bus.