Invention Grant
US08816887B2 Sampling circuit, a method of reducing distortion in a sampling circuit, and an analog to digital converter including such a sampling circuit
有权
采样电路，减少采样电路中的失真的方法，以及包括这种采样电路的模数转换器
- Patent Title: Sampling circuit, a method of reducing distortion in a sampling circuit, and an analog to digital converter including such a sampling circuit
- Patent Title (中): 采样电路，减少采样电路中的失真的方法，以及包括这种采样电路的模数转换器
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Application No.: US13624334Application Date: 2012-09-21
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Publication No.: US08816887B2Publication Date: 2014-08-26
- Inventor: Christopher Peter Hurrell , Roberto Maurino
- Applicant: Analog Devices, Inc.
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Kenyon & Kenyon LLP
- Main IPC: H03M1/00
- IPC: H03M1/00
Abstract:
A sampling circuit comprising: an input node; a first signal path comprising a first sampling capacitor and a first signal path switch in a signal path between the input node and a first plate of the first sampling capacitor; a second signal path comprising a second sampling capacitor and a second signal path switch in a signal path between the input node and a first plate of the second sampling capacitor, and a signal processing circuit for forming a difference between a signal sampled onto the first sampling capacitor and a signal sampled onto the second sampling capacitor.
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