An array substrate comprises data lines, gate lines, thin film transistors and pixel electrodes formed on a base substrate. Pixel units are defined by intersecting the data lines and the gate lines, the thin film transistors are formed at the intersections of the data lines and the gate lines, and the data lines extend across each of the pixel units in the middle of the pixel units. At least two thin film transistors for controlling a same pixel electrode are respectively formed on both sides of the data line in each pixel unit.