Invention Grant
- Patent Title: Nonvolatile semiconductor memory device
- Patent Title (中): 非易失性半导体存储器件
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Application No.: US13425881Application Date: 2012-03-21
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Publication No.: US08817542B2Publication Date: 2014-08-26
- Inventor: Koji Kato , Kazuhide Yoneya
- Applicant: Koji Kato , Kazuhide Yoneya
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JPP2011-208039 20110922
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
A nonvolatile semiconductor memory device in an embodiment includes a semiconductor layer, a memory cell array, word lines, bit lines, a source line, and a control circuit. The memory cell array has memory strings, each of the memory strings having memory cells. The word lines are connected to the control gates of the memory cells. The control circuit controls a voltage applied to the semiconductor layer, the control gates, the bit lines, and the source line. When executing a read operation, the control circuit begins application of a first voltage to the source line at a first time, the first voltage having a positive value. The control circuit begins application of a second voltage to unselected word lines at the first time or thereafter, the second voltage setting the memory cells to a conductive state regardless of retained data of the memory cells.
Public/Granted literature
- US20130077405A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2013-03-28
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