Invention Grant
- Patent Title: Electronic circuit design method
- Patent Title (中): 电子电路设计方法
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Application No.: US14028188Application Date: 2013-09-16
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Publication No.: US08819615B2Publication Date: 2014-08-26
- Inventor: Julien Le Coz , Sylvain Engels , Alain Tournier
- Applicant: STMicroelectronics SA
- Applicant Address: FR Montrouge
- Assignee: STMicroelectronics SA
- Current Assignee: STMicroelectronics SA
- Current Assignee Address: FR Montrouge
- Agency: Gardere Wynne Sewell LLP
- Priority: FR1258909 20120921
- Main IPC: G06F11/22
- IPC: G06F11/22 ; G06F17/50

Abstract:
A first assembly of critical cells is to be monitored. An equivalent capacitance of output cells coupled to the critical path is determined. Logic level inputs of the critical cells for signal propagation are also determined. A second assembly of control logic cells is provided which copies the first assembly in terms of number of cells, type of cells and cell connection such that each of the control cells is a homolog of a corresponding critical cell. Charge cells are provided at the outputs of the control cells having an equivalent capacitance in accordance with the determined capacitance of the output cells. For each control cell, logic levels are asserted in accordance with the determined configuration of the critical path. A signal generator applies a signal the input of the second assembly and a signal receiver is coupled to the output of the second assembly.
Public/Granted literature
- US20140089885A1 ELECTRONIC CIRCUIT DESIGN METHOD Public/Granted day:2014-03-27
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