Invention Grant
US08823011B2 High linearity bandgap engineered transistor 有权
高线性带隙工程晶体管

High linearity bandgap engineered transistor
Abstract:
A high linearity bandgap engineered transistor device is provided. In one example configuration, the device generally includes a substrate and an oxide layer formed on the substrate. The device further includes a wide-bandgap body material formed between a portion of the oxide layer and a gate dielectric layer. The wide-bandgap body material has an energy bandgap of 1.35 eV or higher and is lattice matched to the substrate. The device further includes a source-drain material formed on the oxide layer adjacent to the wide-bandgap body material so as to define a hetero-structure interface where the source-drain material contacts the wide-bandgap body material. The wide-bandgap body material is also lattice matched to the source-drain material. The device further includes a gate material formed over the gate dielectric layer. Other features and variations will be apparent in light of this disclosure.
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