Invention Grant
US08823095B2 MOS-power transistors with edge termination with small area requirement
有权
具有小面积要求的边缘端接的MOS功率晶体管
- Patent Title: MOS-power transistors with edge termination with small area requirement
- Patent Title (中): 具有小面积要求的边缘端接的MOS功率晶体管
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Application No.: US12304789Application Date: 2007-06-14
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Publication No.: US08823095B2Publication Date: 2014-09-02
- Inventor: Ralf Lerner
- Applicant: Ralf Lerner
- Applicant Address: DE Erfurt
- Assignee: X-Fab Semiconductor Foundries AG
- Current Assignee: X-Fab Semiconductor Foundries AG
- Current Assignee Address: DE Erfurt
- Agency: Hunton & Williams LLP
- Priority: DE102006027504 20060614
- International Application: PCT/EP2007/055924 WO 20070614
- International Announcement: WO2007/144416 WO 20071221
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L29/06

Abstract:
It is the purpose of the invention to provide a MOS transistor (20) which guarantees a voltage as high as possible, has a required area as small as possible and which enables the integration into integrated smart power circuits. It results there from as an object of the invention to form the edge structure of the transistors such that it certainly fulfils the requirements on high breakthrough voltages, a good isolation to the surrounding region and requires a minimum of surface on the silicon disc anyway. This is achieved with an elongated MOS power transistor having drain (30) and source (28) for high rated voltages above 100V, wherein the transistor comprises an isolating trench (22) in the edge area for preventing an early electrical breakthrough below the rated voltage. The trench is lined with an isolating material (70, 72), wherein the isolating trench terminates the circuit component.
Public/Granted literature
- US20100295124A1 MOS-POWER TRANSISTORS WITH EDGE TERMINATION WITH SMALL AREA REQUIREMENT Public/Granted day:2010-11-25
Information query
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