Invention Grant
US08823158B2 Semiconductor package and stacked semiconductor package having the same
有权
具有相同的半导体封装和堆叠半导体封装
- Patent Title: Semiconductor package and stacked semiconductor package having the same
- Patent Title (中): 具有相同的半导体封装和堆叠半导体封装
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Application No.: US13630239Application Date: 2012-09-28
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Publication No.: US08823158B2Publication Date: 2014-09-02
- Inventor: Jae Sung Oh , Moon Un Hyun , Jong Hyun Kim , Jin Ho Gwon , Dong You Kim , Ki Bon Cha
- Applicant: SK Hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2008-0091960 20080919
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/48 ; H01L23/52 ; H01L29/40

Abstract:
A semiconductor package includes a substrate having a substrate body possessing a first region, a second region which is defined around the first region and a third region which is defined around the second region. Wiring lines are placed on the substrate body, and the wiring lines have first ends that extend to the third region. Connection patterns are placed in the third region and are electrically connected to the first ends of the wiring lines. A semiconductor chip is disposed in the first region and is electrically connected to the respective wiring lines, and a molding member is disposed in the first and second regions and covers the semiconductor chip.
Public/Granted literature
- US20130026651A1 SEMICONDUCTOR PACKAGE AND STACKED SEMICONDUCTOR PACKAGE HAVING THE SAME Public/Granted day:2013-01-31
Information query
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