Invention Grant
US08823347B2 Voltage boosting/lowering circuit and voltage boosting/lowering circuit control method
有权
电压升压/降压电路和升压/降压电路控制方式
- Patent Title: Voltage boosting/lowering circuit and voltage boosting/lowering circuit control method
- Patent Title (中): 电压升压/降压电路和升压/降压电路控制方式
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Application No.: US13298920Application Date: 2011-11-17
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Publication No.: US08823347B2Publication Date: 2014-09-02
- Inventor: Takeshi Uchiike
- Applicant: Takeshi Uchiike
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Sughrue Mion, PLLC
- Priority: JP2010-257951 20101118
- Main IPC: G05F1/40
- IPC: G05F1/40

Abstract:
A voltage boosting/lowering circuit according to an aspect of the present invention includes an output voltage generation circuit 15 that includes a switch element 2 connected between an input terminal 1 and a choke coil 3 and a switch element 7 connected between the choke coil 3 and a ground, and generates an output voltage by switching the switch elements 2 and 7 between an on-state and an off-state and thereby boosting/lowering an input voltage input to the input terminal 1, a first switch control unit that outputs a first pulse signal to the switch element 2, a duty detection circuit 32 that detects a duty of the first pulse signal, and a second switch control unit that outputs a second pulse signal to the switch element 7 according to the detected duty.
Public/Granted literature
- US20120126769A1 VOLTAGE BOOSTING/LOWERING CIRCUIT AND VOLTAGE BOOSTING/LOWERING CIRCUIT CONTROL METHOD Public/Granted day:2012-05-24
Information query
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