A power converter control circuit includes a ramp signal circuit, a blanking circuit, and a pulse driver circuit. The ramp signal circuit provides a ramp signal in response to a power converter feedback signal and an enable signal. The blanking circuit provides a blanking signal in response to the ramp signal and a clock signal. The blanking signal is provided when both the ramp signal is increasing in value and the enable signal indicates a light load operating condition. The pulse driver circuit provides a power switch control pulse in accordance with the clock signal and in the absence of the blanking signal.