Invention Grant
- Patent Title: Fatal failure diagnostics circuit and methodology
- Patent Title (中): 致命故障诊断电路和方法
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Application No.: US12701687Application Date: 2010-02-08
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Publication No.: US08823411B2Publication Date: 2014-09-02
- Inventor: Christopher M. League
- Applicant: Christopher M. League
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agency: Terrile, Cannatti, Chambers & Holland, LLP
- Agent Michael Rocco Cannatti
- Main IPC: G01R31/26
- IPC: G01R31/26 ; G01R31/40
Abstract:
A fault diagnostic circuit (100) and associated method of operation are described for testing an FET device (114) for a gate-drain short failure (113) by floating the FET gate during a predetermined test period and then comparing (118) the FET output voltage (115) at the source to a predetermined threshold voltage (VTHRESHOLD) which may be selected as a percentage of the power supply voltage (VPOWER) for the FET device to determine if the FET output voltage is greater than the threshold voltage, in which case a device fault is signaled (119).
Public/Granted literature
- US20110193580A1 Fatal Failure Diagnostics Circuit and Methodology Public/Granted day:2011-08-11
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