A planar electronic device includes a planar substrate having a cavity configured to receive a ferrite material body therein. The planar substrate has an upper side and a lower side and conductive vias extending through the substrate. Top conductors are provided on the upper side of the planar substrate and are electrically connected to corresponding conductive vias. Bottom conductors are provided on the lower side of the planar substrate and are electrically connected to corresponding conductive vias. The bottom conductors, top conductors and conductive vias define a primary conductive loop and a secondary conductive loop. An upper cover layer covers the upper side and has a high permittivity. The upper cover layer is positioned relative to the top conductors to increase capacitance between the primary and secondary loops.