Invention Grant
- Patent Title: Reduced noise DRAM sensing
- Patent Title (中): 降低DRAM感知噪声
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Application No.: US13644528Application Date: 2012-10-04
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Publication No.: US08824231B2Publication Date: 2014-09-02
- Inventor: Byoung Jin Choi
- Applicant: MOSAID Technologies Incorporated
- Applicant Address: CA Ottawa
- Assignee: Conversant Intellectual Property Management Inc.
- Current Assignee: Conversant Intellectual Property Management Inc.
- Current Assignee Address: CA Ottawa
- Agent Dennis R. Haszko
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A dynamic random access memory device is described. A first array has a first plurality of bitlines, each coupled to a column of memory cells. A second has a second plurality of bitlines, each coupled to a column of memory cells. Sense amplifiers are selectively connectable in an open bitline configuration to at least one bitline of the first plurality of bitlines and at least one complementary bitline of the second plurality of bitlines. A voltage supply having a voltage VBL corresponding to a bitline precharge voltage is selectively connectable to each bitline. Logic selectively connects each bitline and the complementary bitline to one of a sense amplifier and the voltage supply during a read operation. Each bitline connected to the sense amplifier is adjacent to a bitline concurrently connected to the voltage supply. A method is also described.
Public/Granted literature
- US20130083615A1 REDUCED NOISE DRAM SENSING Public/Granted day:2013-04-04
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