The present application discloses a memory controller for accessing an external memory device. The memory controller comprises a bus interface and an internal memory buffer capable of accessing the bus interface. The internal memory buffer operates as an on-chip storage. In various embodiments of the disclosure, the internal memory buffer operates during a testing of a chip containing the memory controller. For example, the internal memory buffer may emulate the external memory device in response to an input signal. Moreover, in various embodiments of the disclosure, the external memory device may be a dynamic random access memory (DRAM), while the internal memory buffer may be a static random access memory (SRAM). The memory controller may be adapted to automated test equipment (ATE). Moreover, the memory controller may be incorporated onto a system-on-a-chip (SOC) along with one or more agents.