Invention Grant
US08825955B2 Data processing apparatus having a cache configured to perform tag lookup and data access in parallel, and a method of operating the data processing apparatus
有权
具有被配置为并行执行标签查找和数据访问的高速缓存的数据处理装置,以及操作数据处理装置的方法
- Patent Title: Data processing apparatus having a cache configured to perform tag lookup and data access in parallel, and a method of operating the data processing apparatus
- Patent Title (中): 具有被配置为并行执行标签查找和数据访问的高速缓存的数据处理装置,以及操作数据处理装置的方法
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Application No.: US13423614Application Date: 2012-03-19
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Publication No.: US08825955B2Publication Date: 2014-09-02
- Inventor: Faissal Mohamad Sleiman , Ronald George Dreslinski, Jr. , Thomas Friedrich Wenisch
- Applicant: Faissal Mohamad Sleiman , Ronald George Dreslinski, Jr. , Thomas Friedrich Wenisch
- Applicant Address: US MI Ann Arbor
- Assignee: The Regents of the University of Michigan
- Current Assignee: The Regents of the University of Michigan
- Current Assignee Address: US MI Ann Arbor
- Agency: Nixon & Vanderhye P.C.
- Main IPC: G06F12/08
- IPC: G06F12/08

Abstract:
A data processing apparatus has a cache with a data array and a tag array. The tag array stores address tag portions associated with the data values in the data array. The cache performs a tag lookup, comparing a tag portion of a received address with a set of tag entries in the tag array. The data array includes a partial tag store storing a partial tag value in association with each data entry. In parallel with the tag lookup, a partial tag value of the received address is compared with partial tag values stored in association with a set of data entries in said data array. A data value is read out if a match condition occurs. Exclusivity circuitry ensures that at most one partial tag value of said partial tag values stored in association with said set of data entries can generate said match condition.
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