Invention Grant
US08826087B2 Scan circuitry for testing input and output functional paths of an integrated circuit
有权
用于测试集成电路的输入和输出功能路径的扫描电路
- Patent Title: Scan circuitry for testing input and output functional paths of an integrated circuit
- Patent Title (中): 用于测试集成电路的输入和输出功能路径的扫描电路
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Application No.: US13683424Application Date: 2012-11-21
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Publication No.: US08826087B2Publication Date: 2014-09-02
- Inventor: Ramesh C. Tekumalla , Vijay Sharma
- Applicant: LSI Corporation
- Applicant Address: US CA San Jose
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA San Jose
- Agency: Ryan, Mason & Lewis, LLP
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
An integrated circuit comprises scan test circuitry, additional circuitry subject to testing utilizing the scan test circuitry, and control circuitry associated with the scan test circuitry. The scan test circuitry comprises a scan chain having a plurality of scan cells, and the associated control circuitry is coupled to at least a given one of a primary input of the integrated circuit and a primary output of the integrated circuit. The scan test circuitry is configurable by the control circuitry so as to permit testing of both an input functional path associated with the given one of the primary input and the primary output and an output functional path associated with the given one of the primary input and the primary output.
Public/Granted literature
- US20140143621A1 SCAN CIRCUITRY FOR TESTING INPUT AND OUTPUT FUNCTIONAL PATHS OF AN INTEGRATED CIRCUIT Public/Granted day:2014-05-22
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