Invention Grant
- Patent Title: Method of fabricating semiconductor package having substrate with solder ball connections
- Patent Title (中): 制造具有焊球连接的基板的半导体封装的方法
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Application No.: US13616618Application Date: 2012-09-14
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Publication No.: US08828795B2Publication Date: 2014-09-09
- Inventor: Sang-Gui Jo , Ji-Yong Park , Kwangjin Bae , Soyoung Lim
- Applicant: Sang-Gui Jo , Ji-Yong Park , Kwangjin Bae , Soyoung Lim
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Lee & Morse, P.C.
- Priority: KR10-2009-0051622 20090610
- Main IPC: H01L21/60
- IPC: H01L21/60 ; H01L23/498 ; H01L23/00

Abstract:
A semiconductor package includes a base substrate, a semiconductor chip mounted on the base substrate and including bonding pads, first and second connection terminals disposed adjacent to the semiconductor chip on the base substrate and electrically connected to the bonding pads, a first ball land disposed on the base substrate and electrically connected to the first connection terminal, a second ball land spaced apart from the connection terminals, the first ball land disposed between the second ball land and at least one of the first and second connection terminals, a first insulating layer covering the first ball land but exposing at least a part of the second ball land, and a first conductive wire extending onto the first insulating layer and connecting the second connection terminal to the second ball land.
Public/Granted literature
- US20130005092A1 METHOD OF FABRICATING SEMICONDUCTOR PACKAGE Public/Granted day:2013-01-03
Information query
IPC分类: