Invention Grant
- Patent Title: Manufacturing method of semiconductor device
- Patent Title (中): 半导体器件的制造方法
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Application No.: US13368560Application Date: 2012-02-08
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Publication No.: US08828805B2Publication Date: 2014-09-09
- Inventor: Masato Numazaki
- Applicant: Masato Numazaki
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Mattingly & Malur, PC
- Priority: JP2011-056073 20110315
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/00 ; H01L21/56 ; H01L23/495 ; H01L23/31
Abstract:
The formation of a void is suppressed in the assembly of a semiconductor device. An MCU chip and an AFE chip are mounted over a die pad formed of a quadrangle having a pair of first sides and a pair of second sides. After wire bonding is carried out on the MCU chip and the AFE chip, resin is supplied from the side of one second side of the two second sides to the side of the other second side. The resin is thereby passed through the opening between a first pad group and a second pad group over the MCU chip to fill the area between the chips and thus the formation of a void is suppressed in the area between the chips.
Public/Granted literature
- US20120238056A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Public/Granted day:2012-09-20
Information query
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