Invention Grant
- Patent Title: Methods of forming masking layers for use in forming integrated circuit products
- Patent Title (中): 形成用于形成集成电路产品的掩模层的方法
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Application No.: US13852043Application Date: 2013-03-28
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Publication No.: US08828869B1Publication Date: 2014-09-09
- Inventor: Manfred Heinrich Moert
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/768

Abstract:
One illustrative method disclosed herein includes forming a seed layer above a structure, forming a nucleation layer on the seed layer, forming a plurality of spaced-apart, vertically oriented alloy structures that are comprised of materials from the seed layer and the nucleation layer, forming a sacrificial material layer above the nucleation layer and around the alloy structures, performing an etching process to remove the alloy structures and portions of the seed layer so as to thereby define a plurality of openings, forming an initial masking structure in each of the openings, performing an etching process to remove the sacrificial material layer and the nucleation layer so as to thereby expose the structure and define a masking layer comprised of the initial masking structures, and performing at least one process operation on the structure through the masking layer.
Public/Granted literature
- US20140295664A1 METHODS OF FORMING MASKING LAYERS FOR USE IN FORMING INTEGRATED CIRCUIT PRODUCTS Public/Granted day:2014-10-02
Information query
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