Invention Grant
- Patent Title: Variable impedance memory device structure and method of manufacture including programmable impedance memory cells and methods of forming the same
- Patent Title (中): 可变阻抗存储器件结构和制造方法包括可编程阻抗存储单元及其形成方法
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Application No.: US13242854Application Date: 2011-09-23
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Publication No.: US08829482B1Publication Date: 2014-09-09
- Inventor: Antonio R. Gallo , Chakravarthy Gopalan , Yi Ma
- Applicant: Antonio R. Gallo , Chakravarthy Gopalan , Yi Ma
- Applicant Address: US CA Sunnyvale
- Assignee: Adesto Technologies Corporation
- Current Assignee: Adesto Technologies Corporation
- Current Assignee Address: US CA Sunnyvale
- Main IPC: H01L29/778
- IPC: H01L29/778
Abstract:
A programmable impedance memory device structure can include a multi-layer variable impedance memory element formed on a planar surface of a first barrier layer, the multi-layer variable impedance memory element comprising a plurality of layers substantially parallel to the planar surface, including a memory material layer in contact with the planar surface, the first barrier layer being formed above a first insulating layer; and a second barrier layer formed over the memory element having a top surface substantially parallel with the planar surface. The first and second barrier layers can have lower mobility rates for at least one element within the memory material layer than the first insulating layer, and the memory material layer can be programmable by application of an electrical field between at least two different impedance states.
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