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US08829524B2 Thin film transistor array substrate having sandwich structure gate electrode and manufacturing method thereof 有权
具有夹层结构的栅电极的薄膜晶体管阵列基板及其制造方法

  • Patent Title: Thin film transistor array substrate having sandwich structure gate electrode and manufacturing method thereof
  • Patent Title (中): 具有夹层结构的栅电极的薄膜晶体管阵列基板及其制造方法
  • Application No.: US11906522
    Application Date: 2007-10-01
  • Publication No.: US08829524B2
    Publication Date: 2014-09-09
  • Inventor: Shuo-Ting Yan
  • Applicant: Shuo-Ting Yan
  • Applicant Address: TW Miao-Li County
  • Assignee: Innolux Corporation
  • Current Assignee: Innolux Corporation
  • Current Assignee Address: TW Miao-Li County
  • Agency: WPAT, PC
  • Agent Justin King
  • Priority: TW95136316A 20060929
  • Main IPC: H01L27/14
  • IPC: H01L27/14 ;  H01L27/12 ;  H01L21/44
Thin film transistor array substrate having sandwich structure gate electrode and manufacturing method thereof
Abstract:
An exemplary thin film transistor array substrate (200) includes a substrate (210) and a gate electrode (220) formed on the substrate. The gate electrode includes an adhesive layer (226) formed on the substrate, a conductive layer (224) formed on the adhesive layer and a barrier layer (222) formed on the conductive layer, the adhesive layer and the barrier layer both have sandwich structures. A central core of the adhesive layer, the conductive layer, and a central core of the barrier layer are made of a same material.
Abstract(Chinese):

示例性薄膜晶体管阵列基板（200）包括基板（210）和形成在基板上的栅电极（220）。 栅电极包括形成在基板上的粘合剂层（226），形成在粘合剂层上的导电层（224）和形成在导电层上的阻挡层（222），粘合层和阻挡层均具有夹层结构 。 粘合剂层的中心芯，导电层和阻挡层的中心芯由相同的材料制成。

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