Invention Grant
US08829618B2 ESD protection using diode-isolated gate-grounded NMOS with diode string
有权
使用二极管串联的二极管隔离栅极接地NMOS的ESD保护
- Patent Title: ESD protection using diode-isolated gate-grounded NMOS with diode string
- Patent Title (中): 使用二极管串联的二极管隔离栅极接地NMOS的ESD保护
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Application No.: US13288507Application Date: 2011-11-03
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Publication No.: US08829618B2Publication Date: 2014-09-09
- Inventor: Ponnarith Pok , Kyle Schulmeyer , Roger A. Cline , Charvaka Duvvury
- Applicant: Ponnarith Pok , Kyle Schulmeyer , Roger A. Cline , Charvaka Duvvury
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Frederick J. Telecky, Jr.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/02 ; H01L29/78
Abstract:
An ESD protection circuit with a diode string coupled to a diode-isolated, gate-grounded NMOS ESD device. A method of forming an ESD protection circuit with a diode string coupled to a diode-isolated, gate-grounded NMOS ESD device.
Public/Granted literature
- US20120112286A1 ESD PROTECTION USING DIODE-ISOLATED GATE-GROUNDED NMOS WITH DIODE STRING Public/Granted day:2012-05-10
Information query
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