Invention Grant
- Patent Title: Integrated circuit comprising an isolating trench and corresponding method
- Patent Title (中): 集成电路包括隔离沟槽和相应的方法
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Application No.: US13495919Application Date: 2012-06-13
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Publication No.: US08829622B2Publication Date: 2014-09-09
- Inventor: Grégory Bidal , Laurent Favennec , Raul Andres Bianchi
- Applicant: Grégory Bidal , Laurent Favennec , Raul Andres Bianchi
- Applicant Address: FR Crolles
- Assignee: STMicroelectronics (Crolles 2) SAS
- Current Assignee: STMicroelectronics (Crolles 2) SAS
- Current Assignee Address: FR Crolles
- Agency: Wolf, Greenfield & Sacks, P.C.
- Priority: FR1155248 20110616
- Main IPC: H01L29/94
- IPC: H01L29/94 ; H01L29/51 ; H01L21/762 ; H01L29/78 ; H01L29/49 ; H01L21/28
Abstract:
An integrated circuit including at least one isolating trench that delimits an active area made of a monocrystalline semiconductor material, the or each trench comprising an upper portion including an insulating layer that encapsulates a lower portion of the trench, the lower portion being at least partly buried in the active area and the encapsulation layer comprising nitrogen or carbon.
Public/Granted literature
- US20120319206A1 INTEGRATED CIRCUIT COMPRISING AN ISOLATING TRENCH AND CORRESPONDING METHOD Public/Granted day:2012-12-20
Information query
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