Invention Grant
- Patent Title: Compensation method and circuit for line rejection enhancement
- Patent Title (中): 线路抑制补偿补偿方法和电路
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Application No.: US12273322Application Date: 2008-11-18
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Publication No.: US08829811B2Publication Date: 2014-09-09
- Inventor: Kedar Godbole , Hariom Rai
- Applicant: Kedar Godbole , Hariom Rai
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H05B37/02
- IPC: H05B37/02 ; H05B33/08

Abstract:
An embodiment of the present invention is directed to a method and circuit to control light emitting diode (LED) output. The method includes receiving a line voltage signal which powers a lighting circuit comprising an LED and determining an adjustment of a threshold based on a variation of the line voltage signal and/or a controller delay or other practical controller limitation or imperfection. The method further includes dynamically adjusting a threshold or other reference of a controller which controls a switch of said lighting circuit for compensating for line variations to maintain a substantially uniform LED current.
Public/Granted literature
- US20100123411A1 COMPENSATION METHOD AND CIRCUIT FOR LINE REJECTION ENHANCEMENT Public/Granted day:2010-05-20
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