An internal voltage generating circuit capable of controlling a swing width of a detection signal in a semiconductor memory apparatus is provided. The internal voltage generating circuit of a semiconductor memory apparatus includes an internal voltage level detecting unit configured to compare an internal voltage with a target voltage and then generate a detection signal, and an internal voltage level control unit configured to control the internal voltage based on a voltage level of the detection signal, wherein the internal voltage level detecting unit is configured to control a swing width of the detection signal based on a voltage difference between the internal voltage and the target voltage.