Invention Grant
- Patent Title: Semiconductor memory device including vertical channel transistors
- Patent Title (中): 半导体存储器件包括垂直沟道晶体管
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Application No.: US13304851Application Date: 2011-11-28
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Publication No.: US08830715B2Publication Date: 2014-09-09
- Inventor: Hak-Soo Yu , Su-A Kim , Hong-Sun Hwang , Chul-Woo Park
- Applicant: Hak-Soo Yu , Su-A Kim , Hong-Sun Hwang , Chul-Woo Park
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Muir Patent Consulting, PLLC
- Priority: KR10-2011-0014766 20110218
- Main IPC: G11C5/02
- IPC: G11C5/02 ; G11C11/34 ; H01L27/108 ; G11C7/02 ; G11C7/06

Abstract:
A semiconductor memory device is disclosed. The semiconductor memory device includes a memory array block, a first word line and a second word line. The memory array block includes a plurality of adjacent columns of memory cells, each column of memory cells including a plurality of consecutive memory cells having a plurality of respective consecutive cell transistors that comprise at least a first group of cell transistors and a second group of cell transistors. The first word line is disposed above the plurality of respective consecutive cell transistors and electrically connected to the first group of cell transistors, and the second word line is disposed below the plurality of respective consecutive cell transistors and electrically connected to the second group of cell transistors.
Public/Granted literature
- US20120212989A1 MEMORY CORE AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME Public/Granted day:2012-08-23
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