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US08830721B2 Encoded read-only memory (ROM) bitcell, array, and architecture 有权
编码只读存储器(ROM)位单元,阵列和架构

Encoded read-only memory (ROM) bitcell, array, and architecture
Abstract:
Embodiments provide improved memory bitcells, memory arrays, and memory architectures. In an embodiment, a memory cell comprises a transistor having drain, source, and gate terminals; and a plurality of program nodes, with each of the program nodes charged to a pre-determined voltage and coupled to a respective one of a plurality of bit lines.
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