A memory includes memory cells and a sense amplifier including a sense node that transmits a voltage according to a current flowing in one of the memory cells and detects logic of data based on the voltage of the sense node. A write sequence of writing data in a selected cell is performed by repeating write loops each including a write stage of writing data in the selected cell and a verify read stage of verifying that the data has been written in the selected cell by performing discharge from the sense node through the selected cell. The sense amplifier changes, according to a logic of data detected at the verify read stage in a first write loop, a period of discharge from the sense node to the selected cell at the verify read stage in a second write loop following the first write loop.