Invention Grant
- Patent Title: Alignment for multiple FIFO pointers
- Patent Title (中): 多个FIFO指针对齐
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Application No.: US13449684Application Date: 2012-04-18
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Publication No.: US08832393B2Publication Date: 2014-09-09
- Inventor: Jung Ho Cho , Vladimir Sindalovsky , Lane A. Smith
- Applicant: Jung Ho Cho , Vladimir Sindalovsky , Lane A. Smith
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F1/12

Abstract:
In described embodiments, a multiple first-in, first-out buffer pointers (multi-FIFO pointers) alignment system includes synchronization circuitry to align multiple FIFO buffer operations. A FIFO read clock stoppage signal is generated by master logic that stops the read clock shared by all the transmit channels and then re-starts the read clock to align them. The FIFO read clock stoppage signal is applied to the read clock of all FIFOs which need to be aligned and, when rate change is needed, the FIFO read clock stoppage signal suspends the read clock, causing local write and read pointers to be reset. After the FIFO read clock stoppage signal is de-asserted, the read clock starts to all FIFOs concurrently, thereby aligning the channels.
Public/Granted literature
- US20130282995A1 ALIGNMENT FOR MULTIPLE FIFO POINTERS Public/Granted day:2013-10-24
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