Invention Grant
US08835277B2 Method to improve charge trap flash memory core cell performance and reliability
有权
改善电池陷阱闪存核心电池性能和可靠性的方法
- Patent Title: Method to improve charge trap flash memory core cell performance and reliability
- Patent Title (中): 改善电池陷阱闪存核心电池性能和可靠性的方法
-
Application No.: US13680726Application Date: 2012-11-19
-
Publication No.: US08835277B2Publication Date: 2014-09-16
- Inventor: Tung-Sheng Chen , Shenqing Fang
- Applicant: Spansion LLC
- Applicant Address: US CA Sunnyvale
- Assignee: Spansion LLC
- Current Assignee: Spansion LLC
- Current Assignee Address: US CA Sunnyvale
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/762
Abstract:
A semiconductor processing method to provide a high quality bottom oxide layer and top oxide layer in a charged-trapping NAND and NOR flash memory. Both the bottom oxide layer and the top oxide layer of NAND and NOR flash memory determines array device performance and reliability. The method describes overcomes the corner thinning issue and the poor top oxide quality that results from the traditional oxidation approach of using pre-deposited silicon-rich nitride.
Public/Granted literature
- US20140141591A1 Method to Improve Charge Trap Flash Memory Core Cell Performance and Reliability Public/Granted day:2014-05-22
Information query
IPC分类:
