Invention Grant
- Patent Title: Strained gate electrodes in semiconductor devices
- Patent Title (中): 半导体器件中的应变栅电极
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Application No.: US12404050Application Date: 2009-03-13
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Publication No.: US08835291B2Publication Date: 2014-09-16
- Inventor: Chien-Chao Huang , Fu-Liang Yang
- Applicant: Chien-Chao Huang , Fu-Liang Yang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater and Matsil, L.L.P.
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/8238

Abstract:
Embodiments of the invention provide a semiconductor device and a method of manufacture. MOS devices along with their polycrystalline or amorphous gate electrodes are fabricated such that the intrinsic stress within the gate electrode creates a stress in the channel region between the MOS source/drain regions. Embodiments include forming an NMOS device and a PMOS device after having converted a portion of the intermediate NMOS gate electrode layer to an amorphous layer and then recrystallizing it before patterning to form the electrode. The average grain size in the NMOS recrystallized gate electrode is smaller than that in the PMOS recrystallized gate electrode. In another embodiment, the NMOS device comprises an amorphous gate electrode.
Public/Granted literature
- US20090203202A1 Strained Gate Electrodes in Semiconductor Devices Public/Granted day:2009-08-13
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