Invention Grant
- Patent Title: Semiconductor device with interconnection connecting to a via
- Patent Title (中): 具有连接到通孔的互连的半导体器件
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Application No.: US13370723Application Date: 2012-02-10
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Publication No.: US08836135B2Publication Date: 2014-09-16
- Inventor: Hirokazu Kikuchi
- Applicant: Hirokazu Kikuchi
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-044247 20110301
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L21/768 ; H01L23/528 ; H01L23/522

Abstract:
A semiconductor device including: a semiconductor substrate; a plurality of interconnect layers disposed at different heights from the semiconductor substrate, each interconnect layer including an interconnection formed therein; and a via formed in a columnar shape extending in the stack direction of the interconnect layers, the via electrically connecting the interconnections of the different interconnect layers, the interconnections including an intermediate interconnection in contact with the via in the intermediate portion thereof, and the intermediate interconnection including a first type intermediate interconnection passing through the via in a direction perpendicular to the stack direction and in contact with the via on the top surface, bottom surface, and both side surfaces thereof.
Public/Granted literature
- US20120223438A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2012-09-06
Information query
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