Invention Grant
- Patent Title: Positive edge flip-flop with dual-port slave latch
- Patent Title (中): 具有双端口从锁存器的正沿触发器
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Application No.: US13759249Application Date: 2013-02-05
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Publication No.: US08836399B2Publication Date: 2014-09-16
- Inventor: Steven Bartling , Sudhanshu Khanna
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John R. Pessetto; Frederick J. Telecky, Jr.
- Main IPC: H03K3/289
- IPC: H03K3/289 ; H03K3/012

Abstract:
In an embodiment of the invention, a flip-flop circuit contains a 2-input multiplexer, a master latch, a transfer gate and a slave latch. The scan enable control signals SE and SEN of the multiplexer determine whether data or scan data is input to the master latch. The clock signals CLK and CLKN and retention control signals RET and RETN determine when the master latch is latched. The slave latch is configured to receive the output of the master latch, a second data bit D2, the clock signals CLK and CLN, the retain control signals RET and RETN, the slave control signals SS and SSN. The signals CLK, CLKN, RET, RETN, SS and SSN determine whether the output of the master latch or the second data bit D2 is latched in the slave latch. Control signals RET and RETN determine when data is stored in the slave latch during retention mode.
Public/Granted literature
- US20140218091A1 POSITIVE EDGE FLIP-FLOP WITH DUAL-PORT SLAVE LATCH Public/Granted day:2014-08-07
Information query
IPC分类: