Invention Grant
- Patent Title: CMOS integrated circuit and amplifying circuit
- Patent Title (中): CMOS集成电路和放大电路
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Application No.: US13612428Application Date: 2012-09-12
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Publication No.: US08836429B2Publication Date: 2014-09-16
- Inventor: Tadamasa Murakami
- Applicant: Tadamasa Murakami
- Applicant Address: KR Suwon, Gyunggi-Do
- Assignee: Samsung Electro-Mechanics Co., Ltd.
- Current Assignee: Samsung Electro-Mechanics Co., Ltd.
- Current Assignee Address: KR Suwon, Gyunggi-Do
- Agency: McDermott Will & Emery LLP
- Priority: JP2011-254082 20111121
- Main IPC: H03F3/16
- IPC: H03F3/16 ; H03K19/0948 ; H01L27/12 ; H03F1/52 ; H01L29/78 ; H03F3/193 ; H01L21/761 ; H01L27/092 ; H01L27/13 ; H01L27/06

Abstract:
There is provided a CMOS integrated circuit capable of avoiding deterioration of NF characteristic and achieving a high degree of linearity in the case in which an LNA circuit is formed on an SOI substrate and an LAN circuit is formed in a bulk CMOS process. The CMOS integrated circuit includes a field effect transistor having a gate electrode connected to a signal input terminal, a drain electrode connected to a power terminal, and a source electrode connected to a ground terminal, wherein the field effect transistor is formed on the SOI substrate and a connection between a body potential and a potential lower than a source potential are formed by a resistor element. The deterioration of NF characteristic can be avoided and a high degree of linearity can be achieved by using this CMOS integrated circuit.
Public/Granted literature
- US20130127539A1 CMOS INTEGRATED CIRCUIT AND AMPLIFYING CIRCUIT Public/Granted day:2013-05-23
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