A Power Line Communications (PLC) device includes a processing module, memory, and a communication interface. The PLC device determines, at a PLC Physical Layer (PHY), a noise cycle of a power main coupled to the PLC interface. Based upon the noise cycle, the PLC device determines a higher noise period and a lower noise period of the noise cycle and then allocates, by a PLC Media Access Control (MAC) layer, first communication operations in the higher noise period and differing second communication operations in the lower noise period. Such operations may include adjusting framing of PLC MAC layer frames to have a first frame construct during the higher noise period and second frame construct during the lower noise period. Other differences in operations may be coding operations, either block or channel codes, QoS operations, restricting communications, redundant Acknowledgement (ACK) operations, or differing PLC standardized operations during the differing periods.