Invention Grant
- Patent Title: Specifying circuit level connectivity during circuit design synthesis
- Patent Title (中): 在电路设计合成期间指定电路级连接
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Application No.: US12835780Application Date: 2010-07-14
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Publication No.: US08839162B2Publication Date: 2014-09-16
- Inventor: Michael D. Amundson , Dorothy Kucar , Ruchir Puri , Chin Ngai Sze , Matthew M. Ziegler
- Applicant: Michael D. Amundson , Dorothy Kucar , Ruchir Puri , Chin Ngai Sze , Matthew M. Ziegler
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Preston Young
- Main IPC: G06F9/45
- IPC: G06F9/45 ; G06F17/50

Abstract:
Exemplary embodiments include a method for modifying a circuit synthesis flow having automated instructions, the method including receiving circuit design input for a circuit design, receiving custom specifications to the circuit design input, synthesizing high level logic from the circuit design input, placing logic on the circuit design, refining the circuit design and generating a circuit description from the circuit design.
Public/Granted literature
- US20120017186A1 SPECIFYING CIRCUIT LEVEL CONNECTIVITY DURING CIRCUIT DESIGN SYNTHESIS Public/Granted day:2012-01-19
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