Invention Grant
US08839162B2 Specifying circuit level connectivity during circuit design synthesis 有权
在电路设计合成期间指定电路级连接

Specifying circuit level connectivity during circuit design synthesis
Abstract:
Exemplary embodiments include a method for modifying a circuit synthesis flow having automated instructions, the method including receiving circuit design input for a circuit design, receiving custom specifications to the circuit design input, synthesizing high level logic from the circuit design input, placing logic on the circuit design, refining the circuit design and generating a circuit description from the circuit design.
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