Invention Grant
- Patent Title: Differential output circuit and semiconductor integrated circuit
- Patent Title (中): 差分输出电路和半导体集成电路
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Application No.: US13768975Application Date: 2013-02-15
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Publication No.: US08841936B2Publication Date: 2014-09-23
- Inventor: Yutaka Nakamura
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Holtz Holtz Goodman & Chick PC
- Priority: JP2012-166150 20120726
- Main IPC: H03K19/0185
- IPC: H03K19/0185

Abstract:
A differential output circuit has a current source, a voltage source, first paired transistors which, in a first operating mode, switch that current from the current source should be flown to which of paired output terminals, depending on logic levels of differential input signals, and is always turned off in a second operating mode, second paired transistors which, in the second operating mode, switch which of the paired output terminals should be applied with a voltage correlated with a voltage of the voltage source, depending on the logic levels of the differential input signals, and configured to be always turned off in the first operating mode, third paired transistors which, in the second operating mode, pass the current inputted into one of the paired output terminals toward a predetermined reference potential, and is always turned on in the first operating mode, and paired impedances.
Public/Granted literature
- US20140028349A1 DIFFERENTIAL OUTPUT CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2014-01-30
Information query
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