Invention Grant
- Patent Title: Low clock energy double-edge-triggered flip-flop circuit
- Patent Title (中): 低时钟能量双边沿触发触发电路
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Application No.: US13775063Application Date: 2013-02-22
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Publication No.: US08841953B2Publication Date: 2014-09-23
- Inventor: William J. Dally
- Applicant: NVIDIA Corporation
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Zilka-Kotab, PC
- Main IPC: H03K3/00
- IPC: H03K3/00 ; H03K3/012

Abstract:
A double-edge-triggered flip-flop circuit and a method for operating the double-edge-trigger flip-flop circuit are provided. Sub-circuits of a flip-flop circuit are coupled to a ground supply and decoupled the sub-circuits from a power supply when a clock signal is asserted. The sub-circuits generate trigger signals including a first pair of signals and a second pair of signals. The first pair of signals is evaluated, levels of the second pair of signals are maintained when the clock signal is asserted, and an output signal is transitioned to equal an input signal based on the trigger signals when the clock signal is asserted.
Public/Granted literature
- US20140240016A1 LOW CLOCK ENERGY DOUBLE-EDGE-TRIGGERED FLIP-FLOP CIRCUIT Public/Granted day:2014-08-28
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