Invention Grant
- Patent Title: Semiconductor integrated circuit
- Patent Title (中): 半导体集成电路
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Application No.: US13040501Application Date: 2011-03-04
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Publication No.: US08843800B2Publication Date: 2014-09-23
- Inventor: Koichi Nakamura
- Applicant: Koichi Nakamura
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Foley & Lardner LLP
- Priority: JP2010-050785 20100308
- Main IPC: H03M13/00
- IPC: H03M13/00

Abstract:
A semiconductor integrated circuit pertaining to the present invention comprises a plurality of storage elements for storing and holding an input signal, a majority circuit that outputs a result of a majority decision of outputs from the plurality of storage elements; an error detector circuit that detects a mismatch among the outputs of the plurality of storage elements and outputs error signals; and a monitor circuit that monitors the error signals from the error detector circuit, wherein the monitor circuit, based on the error signals, orders a refresh action that rewrites data for rectification to a storage element in which an output mismatch occurs out of the plurality of storage elements and, if rewrite and rectification by the refresh action are unsuccessful, sends a notification to an external unit or process.
Public/Granted literature
- US20110219285A1 SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2011-09-08
Information query
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