Invention Grant
- Patent Title: Password protected built-in test mode for memories
- Patent Title (中): 密码保护内置测试模式为记忆
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Application No.: US12326165Application Date: 2008-12-02
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Publication No.: US08844023B2Publication Date: 2014-09-23
- Inventor: Antonino La Malfa , Marco Messina
- Applicant: Antonino La Malfa , Marco Messina
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G06F7/04
- IPC: G06F7/04 ; G06F12/14 ; G06F13/00 ; G06F17/30 ; G11C7/00 ; G06F21/00 ; G06F11/00 ; G01R31/28 ; G11C7/24 ; G06F21/74 ; G06F21/62 ; H04L9/32 ; G06F21/79 ; G11C29/46
Abstract:
A semiconductor memory may be provided with a built-in test mode that is accessible through a password protection scheme. This enables access to a built-in test mode after manufacturing, if desired. At the same time, the password protection prevents use of the built-in test mode to bypass security features of the memory.
Public/Granted literature
- US20100138915A1 Password Protected Built-In Test Mode For Memories Public/Granted day:2010-06-03
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