Invention Grant
US08848475B2 Fuse circuit, fuse array, semiconductor memory device and method of manufacturing semiconductor device
有权
保险丝电路，保险丝阵列，半导体存储器件及制造半导体器件的方法
- Patent Title: Fuse circuit, fuse array, semiconductor memory device and method of manufacturing semiconductor device
- Patent Title (中): 保险丝电路，保险丝阵列，半导体存储器件及制造半导体器件的方法
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Application No.: US13219749Application Date: 2011-08-29
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Publication No.: US08848475B2Publication Date: 2014-09-30
- Inventor: Jong-Pil Son , Seong-Jin Jang , Byung-Sik Moon , Hyuck-Chai Jung , Ju-Seop Park
- Applicant: Jong-Pil Son , Seong-Jin Jang , Byung-Sik Moon , Hyuck-Chai Jung , Ju-Seop Park
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Agency: Stanzione & Kim, LLP
- Priority: KR10-2010-0083211 20100827
- Main IPC: G11C17/18
- IPC: G11C17/18 ; G11C17/16 ; H01L27/10 ; H01L23/525
Abstract:
A fuse circuit includes a program unit and a sensing unit. The program unit is programmed in response to a program signal and outputs a program output signal in response to a sensing enable signal. The sensing unit outputs a sensing output signal based on the program output signal and the sensing output signal indicates whether the program unit is programmed or not. The program unit includes an anti-fuse cell, a selection transistor, a program transistor and a sensing transistor. The anti-fuse cell includes at least two anti-fuse elements which are connected in parallel and are respectively broken down at different levels of a program voltage.
Public/Granted literature
- US20120051154A1 FUSE CIRCUIT, FUSE ARRAY, SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2012-03-01
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