Invention Grant
- Patent Title: Intelligent timing analysis and constraint generation GUI
- Patent Title (中): 智能时序分析和约束生成GUI
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Application No.: US14010842Application Date: 2013-08-27
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Publication No.: US08863053B2Publication Date: 2014-10-14
- Inventor: Juergen Dirks , Martin Fennell , Matthias Dinter
- Applicant: LSI Corporation
- Applicant Address: SG Singapore
- Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Christopher P. Maiorana, PC
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A system generally including a clock structure analysis tool, a static timing analysis tool and a waveform tool is disclosed. The clock structure analysis tool may be configured to generate a simplified clock structure for a clock signal in a complex clock structure in a design of a circuit. The static timing analysis tool may be configured to generate a plurality of results for a plurality of intermediate signals in the simplified clock structure in response to a static timing analysis of the design. The waveform tool may be configured to generate a first representation in a graphical user interface format of the intermediate signals and the results.
Public/Granted literature
- US20130346932A1 INTELLIGENT TIMING ANALYSIS AND CONSTRAINT GENERATION GUI Public/Granted day:2013-12-26
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