Invention Grant
US08866026B2 Construction of reliable stacked via in electronic substrates—vertical stiffness control method
有权
在电子基板中构建可靠的堆叠通孔 - 垂直刚度控制方法
- Patent Title: Construction of reliable stacked via in electronic substrates—vertical stiffness control method
- Patent Title (中): 在电子基板中构建可靠的堆叠通孔 - 垂直刚度控制方法
-
Application No.: US13569826Application Date: 2012-08-08
-
Publication No.: US08866026B2Publication Date: 2014-10-21
- Inventor: Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
- Applicant: Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Michael J. Buchenhorner; Vazken Alexanian
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K1/09 ; H05K3/46 ; H01L23/498 ; H05K1/02
Abstract:
A stacked via structure for reducing vertical stiffness includes: a plurality of stacked vias, each via disposed on a disc-like structure. The disc-like structure includes a platted through hole landing with a thickness of substantially 3 μm. The platted through hole landing includes an etched pattern and a copper top surface.
Public/Granted literature
- US20120299195A1 CONSTRUCTION OF RELIABLE STACKED VIA IN ELECTRONIC SUBSTRATES - VERTICAL STIFFNESS CONTROL METHOD Public/Granted day:2012-11-29
Information query
