A data processor including: a reference signal generator configured to generate a reference signal, which is used to convert a level of an analog processing signal into digital data, that gradually varies to enhance an amplitude of the processing signal; a comparator configured to compare the processing signal with the reference signal generated by the reference signal generator; and a count period controller configured to perform a real number count operation of performing a count process during a period from a time point when the reference signal has a predetermined initial value to a time point when the processing signal is equal to the reference signal or a complement number count operation of performing a count process during a period from a time point when the processing signal is equal to the reference signal to a time point when the reference signal reaches a predetermined final value, on the basis of the comparison result of the comparator, wherein, the count period controller independently controls the real number count operation and the complement number count operation of the counter on the basis of a predetermined criterion.