Invention Grant
- Patent Title: Semiconductor memory device
- Patent Title (中): 半导体存储器件
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Application No.: US13443511Application Date: 2012-04-10
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Publication No.: US08867262B2Publication Date: 2014-10-21
- Inventor: Masanao Yamaoka , Kenichi Osada , Kazumasa Yanagisawa
- Applicant: Masanao Yamaoka , Kenichi Osada , Kazumasa Yanagisawa
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Mattingly & Malur, PC
- Priority: JP2002-371751 20021224
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C5/14 ; G11C11/417

Abstract:
A semiconductor device includes plural memory cells each having a first inverter and a second inverter, with an input of the first inverter being coupled to an output of the second inverter and an input of the second inverter being coupled to an output of the first inverter. The first and second inverters have drive transistors supplied with a source voltage where the source voltage is raised in response to a level shift of a control signal supplied to a switch of a control circuit. The control circuit further includes a resistance element in parallel with a MOS transistor connected as a diode.
Public/Granted literature
- US20120195110A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2012-08-02
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