Invention Grant
US08867698B2 Counting circuit, delay value quantization circuit, and latency control circuit 有权
计数电路,延迟值量化电路和延时控制电路

Counting circuit, delay value quantization circuit, and latency control circuit
Abstract:
A counting circuit includes: a clock division unit configured to divide a reference clock signal at a preset division ratio and generate a divided clock signal, a counting unit configured to count the divided clock signal, and a counting control unit configured to enable the counting unit during an enable period corresponding to the division ratio.
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