Invention Grant
US08867739B2 Integrated silicon circuit comprising a physicallly non-reproducible function, and method and system for testing such a circuit
有权
集成硅电路,包括物理上不可重现的功能,以及用于测试这种电路的方法和系统
- Patent Title: Integrated silicon circuit comprising a physicallly non-reproducible function, and method and system for testing such a circuit
- Patent Title (中): 集成硅电路,包括物理上不可重现的功能,以及用于测试这种电路的方法和系统
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Application No.: US13522680Application Date: 2011-01-10
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Publication No.: US08867739B2Publication Date: 2014-10-21
- Inventor: Jean-Luc Danger
- Applicant: Jean-Luc Danger
- Applicant Address: FR Paris
- Assignee: Institut Telecom—Telecom Paris Tech
- Current Assignee: Institut Telecom—Telecom Paris Tech
- Current Assignee Address: FR Paris
- Agency: Baker & Hostetler LLP
- Priority: FR1050297 20100118
- International Application: PCT/EP2011/050234 WO 20110110
- International Announcement: WO2011/086051 WO 20110721
- Main IPC: G06F21/00
- IPC: G06F21/00 ; G06F21/31 ; G06F21/73 ; H04L9/08 ; G01R31/317

Abstract:
A silicon integrated circuit includes a physically non-copyable function LPUF that generates a signature specific to the circuit. The function includes a ring oscillator composed of a loop traversed by a signal. The loop is formed of N topologically identical chains of lags connected in series and an inversion gate, a chain of lags being composed of M delay elements connected in series. The function also includes a control module generating N control words being used to configure the value of the delays introduced by the chains of lags on the signal traversing them. A measurement module measures the frequency of the signal at the output of the last chain of lags after updating the control words, and the control module can deduce from the frequency measurements the bits making up the signature of the circuit. A method and a system for testing such circuits are also provided.
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