Invention Grant
- Patent Title: Methods and apparatus for predicting an underflow condition associated with a floating-point multiply-add operation
- Patent Title (中): 用于预测与浮点乘法运算相关联的下溢条件的方法和装置
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Application No.: US11227463Application Date: 2005-09-15
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Publication No.: US08868632B2Publication Date: 2014-10-21
- Inventor: Marius A. Cornea-Hasegan
- Applicant: Marius A. Cornea-Hasegan
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F7/38
- IPC: G06F7/38 ; G06F7/544

Abstract:
Methods and apparatus for predicting an underflow condition associated with a floating-point multiply-add operation are disclosed. An example apparatus obtains a first operand value and a second operand value. The example apparatus then determines if the second operand value subtracted from the first operand value is greater than a minimum value and determines if the first operand value is greater than a sum value associated with a minimum operand value. The example apparatus then asserts an output signal indicative of an absence of an underflow condition associated with a floating-point value based on conditions associated with determining whether the second operand value subtracted from the first operand value is greater than the minimum value and determining if the first operand value is greater than the sum value.
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