Invention Grant
- Patent Title: Partial fault processing method in computer system
- Patent Title (中): 计算机系统部分故障处理方法
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Application No.: US13453049Application Date: 2012-04-23
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Publication No.: US08868968B2Publication Date: 2014-10-21
- Inventor: Tomoki Sekiguchi , Hitoshi Ueno
- Applicant: Tomoki Sekiguchi , Hitoshi Ueno
- Applicant Address: JP Tokyo
- Assignee: Hitachi, Ltd.
- Current Assignee: Hitachi, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Volpe and Koenig, P.C.
- Priority: JP2011-096689 20110425
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/07 ; G06F11/20

Abstract:
As regards a hardware fault which has occurred in a computer, a hypervisor notifies an LPAR which can continue execution, of a fault occurrence as a hardware fault for which execution can be continued. Upon receiving the notice, the LPAR notifies the hypervisor that it has executed processing to cope with a fault. The hypervisor provides an interface for acquiring a situation of a notice situation. It is made possible to register and acquire a situation of coping with a hardware fault allowing continuation of execution through the interface, and it is made possible to make a decision as to the situation of coping with a fault in the computers as a whole.
Public/Granted literature
- US20120272091A1 PARTIAL FAULT PROCESSING METHOD IN COMPUTER SYSTEM Public/Granted day:2012-10-25
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